Phase-locked loop circuits based on LC-based voltage-controlled oscillators (e.g., voltage-controlled oscillators (VCOs) that include inductors and capacitors) may exhibit high quality factors and desirable phase noise and jitter performance in comparison to ring-based voltage-controlled oscillators. Therefore, phase-locked loop circuits with LC-based VCOs are often used for generating clock signals used by high-speed serial interface circuits.
The operating frequency range of a phase-locked loop circuit may be limited by the frequency tuning range of its voltage-controlled oscillator. A conventional LC-based voltage-controlled oscillator generally has one or more fixed inductors (i.e., inductors that have a fixed inductance value) and a varactor (i.e., a voltage-controlled capacitor). Because the value of the inductance is fixed, the frequency tuning range of the oscillator is limited by the number of inductors and the amount of capacitance tuning that can be achieved using the varactor.
A situation may arise where the phase-locked loop circuit is not able to generate a clock signal within a given frequency range. Consequently, any communications protocol that relies on a clock signal within that given frequency range cannot be supported by a high-speed serial interface circuit that receives its clock signal from such a phase-locked loop circuit.